1. Field of the Invention
Exemplary embodiments of the present invention relate to a data bus system and, more particularly, to an Advanced High-performance Bus (hereinafter referred to as “AHB”) bus system having improved speed and performance that includes a number of AHB buses.
2. Description of the Related Art
Recently, ARM series processors are widely used as a CPU that includes an embedded system. A bus protocol that is widely used to implement a system with the ARM processor is an Advanced Micro-controller Bus Architecture (hereinafter, referred to as “AMBA”) specified by ARM Inc. The AMBA includes an Advanced High-performance Bus for a high-speed device and an Advanced Peripheral Bus (hereinafter, referred to as “APB”) for a low-speed device. The device, which is designed to have an interface operable to meet the AMBA specification, can be integrated into any system based on the AMBA. So far, a system implemented with the AMBA generally includes a single AHB and a single APB. In other words, the conventional AMBA system has one AHB which is connected with several master devices and slave devices. FIG. 1 illustrates a conventional AMBA having a single AHB bus system. Referring to FIG. 1, the structure of the conventional AMBA includes a Central Processing Unit (hereinafter, referred to as “CPU”) 110, a Bus Arbiter 120, master devices 130, 140, 150 and slave devices 160, 170, 180 which are connected to the single AHB.
Although the conventional embedded system has shown sufficient performance even in the single AHB bus structure as illustrated above, as the embedded system has evolved to a System On Chip, which requires higher performance than the AHB bus system. More devices are connected on the system bus in the System On Chip than before, thus requiring higher performance. This higher performance requirement restricts implementation of the System On Chip with the current single AHB bus structure.
When several master and slave devices are connected to one AHB bus in the conventional AMBA, a bus overload problem may exist creating limitations on the improvement of an operational speed of the system. Moreover, when one master uses the bus in the conventional AMBA, the other master could not use the bus, so that a bus sharing problem may occur.